An Infrastructural IP for Interactive MPEG-4 SoC Functional Verification

Trio Adiono, Hans G. Kerkhoff, Hiroaki Kunieda

Abstract


This paper introduces a specific architecture including an infrastructural IP for functional verification and diagnostics, which is suitable for functional core-based testing of an MPEG4 SoC. Our advanced MPEG4 SoC results in a high complexity SoC with limited physical access to many different functional cores. The proposed test method provides direct monitoring and control for each core, which enables core verification at actual speed. It significantly decreases the verification time due to the large number of required test vectors in typical MPEG4 verification. Furthermore, it also makes the system scalable for functional core expansion due to upgrading of standards. The proposed infrastructural IP is also linked to PC-based interactive tools to simplify the verification of individual and integrated cores. It also provides detailed diagnostic data that enables simple system debugging. The debugging tools also feature test-pattern generation and simulation of expected values. Actual system implementation has shown full functionality of our proposed method.

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References


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DOI: http://dx.doi.org/10.5614%2Fitbj.ict.2009.3.1.4

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